جست و جو مقالات

دسته بندی

Area and Power Optimization Method for High-Speed Dual VT Domino Logic with Noise Constraint

> A new design methodology for dual Vt domino logic design based on noise, area and power constraints... read more

Post

A Novel Technique for Reducing Subthreshold Current of VLSI Combinational Circuits

In this paper, a new technique for reducing the subthreshold leakage current of CMOS […]

read more

تازه ترین مقالات

AVR Programming
0.00 KB 61 downloads
مجلاتThe MagaPi
0.00 KB 23 downloads