An Asynchronous Memory Array for Robust Embedded Systems

 This paper presents a fully asynchronous 1k´4bit memory array with no assumption regarding to gate delays; thus suitable for systems with considerable changes in the voltage level and the environmental variables. The nominal voltage level was 3.3v, and it is shown that the design can still operate properly at the voltage levels as low as 1.2v. The design is based on QDI timing model and implemented using the Martin method

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